Suppose that a 32M x 16 main memory is built using 512K × 8 RAM chips and memory is word-addressable. (Please show detailed work) f) If high-order interleaving is used, where would address 32(base 10) be located? (Your answer should be "Bank#, Offset#")
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Suppose that a 32M x 16 main memory is built using 512K × 8 RAM chips and memory is word-addressable. (Please show detailed work)
f) If high-order interleaving is used, where would address 32(base 10) be located? (Your answer should be "Bank#, Offset#")
g) Repeat (f) for low-order interleaving.
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- By assuming that X = 3, and 33 is a two digit number, consider memory storage of a 64-bit word stored at memory word 33 in a byte-addressable memory (a) What is the byte address of memory word 33? (b) What are the byte addresses that memory word 33 spans? (c) Draw the number 0xF1234567890ABCDE stored at word 33 in both big endian and little-endian machines. Clearly label the byte address corresponding to each data byte value.Consider memory storage of a 32-bit word stored at memory word 34 in a byte addressable memory. (a) What is the byte address of memory word 34? (b) What are the byte addresses that memory word 34 spans? (c) Draw the number 0x3F526372 stored at word 342 in both big-endian and little-endian machines. Clearly label the byte address corresponding to each data byte value.Please solve and show all work. For the following C statement, what is the corresponding MIPS assembly code? Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 8-byte words: f = (g+i+2) + (h − 8); B[8] = A[i-9] + A[j+8] + 7;
- Q2- Write a program in assembly language for the 8085 microprocessor to receive one byte of data via the SID and store it at the memory address (3000H to 3009H) using a baud rate of 1200. Information: The 8085 processor operates at a frequency of 3.072 MHz . When receive the required bytes, you must adhere to the following: The bits of two high bits will be received at the beginning of the reception(start bits 1 1 ), after that the data bits will be received, after that the low bit of the stop bit will be received (stop bit 0 ). The following flowchart will help you. The solution must be integrated and include the calculation of the baudrate delay timeComplete the following table: MIPS Instruction op code rs rt rd shamt funct imm. /address Hexadecimal Representation add $t4, $s2, $s1 addi $s0, $t0, 123 lw $s6, -88($t7) Note: In MIPS register file, temporary registers $t0-$t7 have indices 8-15 (respec- tively). Also, the saved registers $s0-$s7 have indices 16-23 (respectively).**) – Provide the format and assembly language instruction for the following hex values: Address 1000: 13 Address 1001: 03 Address 1002: C5 Address 1003: 00 Hint: first consider big-endian vs. little-endian as you convert to binary. Then, divide the bits up into the appropriate fields, decipher the opcode, and so on.
- Please look at the entire text below. Please solve and show all work. Thank you. What is the corresponding MIPS assembly code for the following C statement? Assume that the variables f, g, h, i, and j are assigned to register $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. B[8] = A[i−j] Translate the following C code to MIPS. Assume that the variables f, g, h, i, and j are assigned to register $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 8-byte words: B[8] = A[i] + A[j] Assume that registers $s0 and $s1 hold the values 0x80000000 and 0xD0000000, respectively. What is the value of $t0 for the following assembly code? add $t0, $s0, $s1 Is the result in $t0 the desired result, or has there been an overflow? For the contents of registers $s0 and $s1 as…2. Memory contents (in hexadecimal) are 0005, 0001, 0123 for addresses 000 to 002, then 2002, 1000, 7800, F400 for addresses 80A through 80D. AC starts with value 0F24, PC has the value 80A, and AR has the value 4F5. Starting with time-step T0, describe what happens until the next TO. Make sure to indicate any updated register values as they happen. (Assume R= 0.) Refer to table 5.6 from Mano's textbook. F24 1 AR(c) What are the physical memory addresses for each of the following logical addresses for the segment table (Table 2)? Note any that are invalid. The logical addresses are: (i) 3, 15 (ii) 0, 512 (iii) 1, 4096 (iv) 0,1 Table 2: Segment table Segment Base Address Length 0 400 1 4096 2 810 3 1024 16384 4096 32768 20480
- Q1- Write a program in assembly language for the 8085 microprocessor to receive 10 bytes of data via the SID and store it at the memory address (3000H to 3009H) using a baud rate of 1200. Information: The 8085 processor operates at a frequency of 3.072 MHz. When you receive each byte of the required bytes, you must adhere to the following: The bits of two high bits will be received at the beginning of the reception (start bits), after that the data bits will be received, after that the low bit of the stop bit will be received (stop bit). The following flowchart will help you, but you should notice that this flowchart deals with one byte, and you are required to deal with 10 bytes The solution must be integrated and include the calculation of the baudrate delay time Of+CD!HID+[00 Yes SIDATA Read SID Start Bit? Wait for Half-Bit Time Set up Bit Counter Wait Bit Time Read SID Save Bit Decrement Bit Counter All Bits Received? Add Bit to Previous Bits Go Back to Get Next Bit Return IMUNIAnswer the question below based on given portion of the memory unit with a word size of 8 bits, and the four 8-bit registers: AR, BR, CR, and DR. (all values are in binary) Address Data b0100001 00001110 p0100010 01011100 00100011 00011001 The four 8-bit registers AR, BR, CR, and DR initially have the following values: AR = 00100011 BR = 00000101 CR = 00101101 DR = 01001011 Fill the missing fields in the memory unit below and determine the 8-bit values in each register after the execution of the following sequence of microoperations. DR <- MJARI, BR <- BR+2 DR <- DR+CR, AR <- AR-2 M[AR] <- DR Address Data p0100001 00100001 b0100010 00100010 00100011 00100011 AR = 00100011 BR = 00000101 CR = 00101101 DR = 01001011Find the machine codes of following 8085 instructions and in each case identify the opcodepart, and register/ memory reference bits. Also mention the length of opcode, number of bytesin the instruction.MOV A, M;MVI C, data;PUSH B;ADC B;XRA L;JNZ addressLDAX B Translate the following Assembly program of 8085 into machine code (hex format) MVI C, 20LXI H, 1500hMVI A, 00next; MOV B, MADC BINX HDCR CJNZ nextSTA 1600hHLTAssume that the program is to be stored in memory starting at address 1000h Find out the number of machine cycles and the number of T-states taken by the following8085 instructions. In each case give an explanation for your answer.(i) ADC D(ii) ADI 05(iii) JMP 1500h(iv) JNZ 1500h(v) LDAX B(vi) MOV A, B(vii) LDA 1300h Draw a complete connection diagram of a computer system with 8085 as processor, a four 1KRAM, and four 1K ROM chips. Give the address range for each RAM and ROM chips. Translate the sumArray function (written in C below) to 8085 assembly…