Memory Management Indirect relative addressing refers to an addressing scheme in which the memory address to be accessed is specified explicitly. The memory management unit (MMU) maps virtual to physical addresses. Segmentation is a memory management approach in which memory areas (segments) allocated to processes are defined by their starting address (base) and length. The main memory is divided into two partitions when using a single-partition allocation scheme.

Memory Management Indirect relative addressing refers to an addressing scheme in which the memory address to be accessed is specified explicitly. The memory management unit (MMU) maps virtual to physical addresses. Segmentation is a memory management approach in which memory areas (segments) allocated to processes are defined by their starting address (base) and length. The main memory is divided into two partitions when using a single-partition allocation scheme.

Systems Architecture

7th Edition

ISBN:9781305080195

Author:Stephen D. Burd

Publisher:Stephen D. Burd

Chapter11: Operating Systems

Section: Chapter Questions

Problem 21VE

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Memory Management select which is true options: a The main memory is divided into two partitions when using a single-partition allocation scheme. b The memory management unit (MMU) maps virtual to physical addresses. c The frame table used in systems that use paging is a per-process data structure. d Indirect relative addressing refers to an addressing scheme in which the memory address to be accessed is specified explicitly. e Segmentation is a memory management approach in which memory areas (segments) allocated to processes are defined by their starting address (base) and length.
In the context of memory allocation, dynamic memory allocation refers to the process by which memory is allocated and deallocated at runtime.
A computer system has the segmented paging for virtual memory. The memory is byte addressable. Both virtual and physical address spaces contain 216 bytes each. The virtual address space is divided into 8 non-overlapping equal size segments. The memory management unit has a hardware segment table, each entry of which contains the physical address of the page table for the segment. Page tables are stored in the main memory and consists of 2 byte page table entries What is the minimum page size in bytes so that the page table for a segment requires at most one page to store it and also give the division of virtual address ?
The fragmentation of the "external" memory allocation mechanism is
In the S/370 architecture, a storage key is a control field associated with each page- sized frame of real memory. Two bits of that key that are relevant for page replace- ment are the reference bit and the change bit. The reference bit is set to 1 when any address within the frame is accessed for read or write, and is set to 0 when a new page is loaded into the frame. The change bit is set to 1 when a write operation is per- formed on any location within the frame. Suggest an approach for determining which page frames are least-recently-used, making use of only the reference bit.
Please written by computer source Two main techniques are used for memory management in modern computers and operating systems, as described in this module's readings: paging and segmentation. Sometimes they are combined in a segmentation with paging scheme. Design a memory management scheme for a 50 bit computer architecture, using paging, segmentation or both, as described in this module's readings. Your post should include a clear translation scheme from a 50 bit logical address to a 50 bit physical address including a picture that shows how this translation takes place. In particular, each field of the logical address must be clearly depicted and its length in bits must be specified. The proposed scheme must be at least somewhat realistic; for this reason, simple paging and simple segmentation schemes are automatically disqualified, due to the impossible requirements imposed on the implementation in this case (50 bits addresses).
Paging: Select all of the following statements that are true. Systems that use paging but do not support inverted page tables maintain at least one separate page table for each process. The frame table is a system-wide data structure. When paging is applied, the selected page size determines which part of a virtual address belongs to the page number and which to the offset. The page size may differ from the frame size. The Translation Look-aside Buffer (TLB) represents a page directory for all pages in the system. Paging is prone to internal fragmentation.
Memory Hierarchy and Cache Suppose that we have a computer that uses a memory address of 12-bits. This computer has a 64-byte cache with 16 bytes per frame. The computer accesses a number of memory locations throughout the course of a running program. Suppose this computer uses direct-mapped cache. The system accesses the following memory addresses (given in hex) in this exact order: F2E, A17, 2E0, 44E, 34F, 341, B50, B58 a. What is the hit ratio for the memory reference sequence given above? b. Show the content of each cache frame following each memory reference (frame content to be shown as tag +frame index) c.If we keep the same cache size and the same frame size but switch to a 2-way set associative cache mapping scheme. Given the memory address reference 555, indicate where we would look in the cache to find this data. Indicate which fields will be used to find the exact location?
Explain the key distinction between static and dynamic memory allocation.
Main memory size is 16 pages. Size of swap file on hard disk is 64 pages. Operating system locks down pages 0, 1, 2 and 7 in the main memory. Two programs are started and both are provided with a virtual address space of 10 pages. Initially operating system allocates 5 pages of main memory for each program and the rest from swap file. Virtual address space of each program starts from page 0. Construct page tables for both programs at program startup. A page table consists of P-bit which tells if the page is present in the main memory (1 = page is in main memory) and address of the page. Address tells either real address in main memory or the address of the page in swap file. b. A computer with a paged virtual memory system executes two load instructions that are adjacent to each other in memory. Describe the worst case scenario (in terms of performance) that can occur during the execution of the two instructions and explain under which conditions this case occurs. How does this affect…
Main Memory (MM) and Central Processing Unit are important resources of the computer system that must be carefully managed. The part of Operating System (OS) that manages the memory is called Memory Manager. 'Partition' is a memory management scheme, which allocates processes in MM into a unique fixed-size partition; each partition contains exactly one process. When a partition is free, the OS selects a process from the input queue and loads it into the free partition; when the process terminates, the partition becomes available; a free partition is called 'hole'. Please, reply to the following questions by giving your own ORIGINAL and UNIQUE answers: a) Draw a picture of the Main Memory (MM) divided into A 'assigned partitions' and B 'holes': fix your values for A and B1, and draw the corresponding MM layout. In the following, Pi, Pj and Pk are three processes residing in MM b) Considering the 7 states diagram, answer to the following questions: 1) Can Pi be in the 'New' state? Why?…
Briefly explain dynamic memory allocation