Quiz 5: In this problem we want to set the control signals of the datapath shownbelow (also in in slide # 1 of "chapter3_single_cycle_datapaths.pptx") so that itsupports execution of a new instruction called swi.Single Cycle Datapath:PCRead Instru-addressction[31-0]InstructionmemorySnsAddIns1 [25-21]1 [20-16][15-11].1[10-0]RegWriteReadregister 1Readregister 2WriteregisterWritedataReaddata 1Readdata 2Read InsWrite 3nsSignextend2nsMemWriteRead Readaddress dataWriteaddressRead GnsWritedata Write 10nsinsALUSTO1MemReadALUResult2nsALUOP1-XEWO)insALUSrc2ALUSrc3x=3insALUResult2nsALUOP2swi rd, rs, rt, imm # Memory [R[rs]]= R[rt],R[rd] =R [rs]+R [rt]+Imm#this instruction copies contents of "rt" register into themain memory addressed by the "rs" register. In the same cycleit add "rs" and "rt" register contents along with the "imm"field of the instruction and writes the final result into the"rd" register.You are NOT allowed to modify the datapath. ALU operation (ALUOP) can be add,sub, mul, sll, and srl. Indicate the value of each control signal (RegWrite, ALUSrc1,ALUSrc2, ALUSrc3, ALUOp1, ALUOp2, MemRead, MemWrite). You must use "X" forcontrol signals when applicable.In the space below list the sequence of processes in the execution order that are onthe critical path for the swi instruction. (Processes to choose from are: Register Read,Register Write, Memory Read, Memory Write, ALU1, ALU2, MuxALUSrc1,MUXALUSrc2, MuxALUSrc3, SignExtension, Instruction Memory, Add). What is theminimum cycle time needed to execute this instruction?

Name: Quiz 5: In this problem we want to set the control signals of the dat
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Description: Quiz 5: In this problem we want to set the control signals of the datapath shownbelow (also in in slide # 1 of "chapter3_single_cycle_datapaths.pptx") so that itsupports execution of a new instruction called swi.Single Cycle Datapath:PCRead Instru-a

Single Cycle Datapath which refers to the equivalent to the original single cycle datapath. The data…

Engineering

Computer Science

In the space below list the sequence of processes in the execution order that are on the critical path for the swi instruction. (Processes to choose from are: Register Read, Register Write, Memory Read, Memory Write, ALU1, ALU2, MuxALUSrc1, MUXALUSrc2, MuxALUSrc3, SignExtension, Instruction Memory, Add). What is the minimum cycle time needed to execute this instruction?

In the space below list the sequence of processes in the execution order that are on the critical path for the swi instruction. (Processes to choose from are: Register Read, Register Write, Memory Read, Memory Write, ALU1, ALU2, MuxALUSrc1, MUXALUSrc2, MuxALUSrc3, SignExtension, Instruction Memory, Add). What is the minimum cycle time needed to execute this instruction?

Database System Concepts

7th Edition

ISBN:9780078022159

Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan

Chapter1: Introduction

Section: Chapter Questions

Problem 1PE

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