Construct a 4K x 8 DRAM module using 2K x 4 DRAM ICs
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- Design a memory circuit that holds two 2-bit words (i.e., a 2 × 2 memory).Design a 9v DC oscillator circuit that produces a frequency of 500 Hz. The circuit may use a 555 timer or two transistor design(s). Show all calculations including the DC currents and bias voltages. Include the schematic and the required frequency formula(s). Do the best you can as the process to arrive at a final answer will be evaluated as well. From this, if a larger load were required to be connected to the chip, how would the schematic look and what components would be used to do design it? Also, as a theoretical approximation, if the 9v battery had a rating of 4 amp-hours, how long would it last powering this circuit? Show calculations to illustrate how you arrived at the answer. Remember, these questions are a reflection of your own work. Make sure any references used are cited.The frequency of the crystal oscillator for 80C51 MCU is 12MHz. Design a software delay program with a delay time of 20ms in assembly language.
- Draw a block diagram of Data Bus Transceiver CircuitA MOD-8 ripple counter uses JK flip-flops. If the propagation delay of each flip-flop is 40 nano sec then the maximum clock frequency that can be used is equal to (Approximately) (A) 8.3 K Hz (B) 8.4 KHz (C) 8.3×10°HZ (D) 8.3 MHzGiven the following Combinational circuit, Use Verilog HDL on Quartus tool to1. Write a Verilog HDL code to describe the module DCDR2×4 // this module name must be your last name ( younis2. Write a Verilog HDL code to describe the whole system structurally from its subsystems// this module name must be your university number ( 1181230)
- A 10 MHz clock frequency is applied to a cascaded counter consisting of a modulus-5 counter,a modulus-8 counter, and two modulus-10 counters. The lowest output frequency possible is(a) 10 kHz (b) 2.5 kHz(c) 5 kHz (d) 25 kHzConstruct the circuit diagram for this 4-bit Parallel Adder source code: Run this program in verilog: module main(in1,in2,ic,out,oc);input [3:0]in1;input [3:0]in2;input ic;output [3:0]out;output [3:0]oc;fulladder fa1(in1[0],in2[0],ic,out[0],oc[0]);fulladder fa2(in1[1],in2[1],oc[0],out[1],oc[1]);fulladder fa3(in1[2],in2[2],oc[1],out[2],oc[2]);fulladder fa4(in1[3],in2[3],oc[2],out[3],oc[3]);endmodule.Draw the complete working schematic for the interface of PIC microcontroller with a single digit seven segment display so that the following pins are connected to the digits of the 7 segment display as follows: RE0 connected to a, RE1 for b, RE2 for c, RD0 for d, RD1 for e, RD2 for f, RD3 for g, RD4 for decimal point. Also show a temperature sensor connected to RA0 for reading the analog input. Write a short program to initialize the corresponding ports and show the character ‘A’ followed by the character ‘b’ with a 1 second delay in a continuous loop. Clearly show how the patterns for the characters are derived and used for the program in a neat table.
- Using Assembly Language, a microcontroller is connected to a crystal oscillator with frequency of 16MHz. Calculate the time taken to excite one machine cycle.There are many different process technologies used to achieve PLDs' programmable connections; provide six examples.using vhdl code in Qyartus II program to build a 2 bit Mux A,B,F: 2 bit numbers A1 A0 B1 B0 F1 F0