Assume register R1 contains an arbitrary integer A, and R2 contains an arbitrary integer B. Which of the following sequences of machine instructions implement the exact condition A < B so that the branch skips the halt instruction? Mark all correct choices. FYI: Be certain; Canvas deducts points for incorrect choices. 0 U U 1001 011 001 1 11111 0001 011 011 1 00001 0001 011 010 0 00 011 0000 001 000011111 1111 0000 0010 0101 0001 011 001 0 00 010 0000 001 000011111 1111 0000 0010 0101 1001 011 001 1 11111 0001 011 011 1 00001 0001 011 010 0 00 011 0000 101 000011111 1111 0000 0010 0101 1001 011 010 1 11111 0001 011 011 1 00001 0001 011 001 0 00 011 0000 010 000011111 1111 0000 0010 0101 1001 011 010 1 11111 0001 011 011 1 00001 0001 011 001 0 00 011 0000 100 000011111 1111 0000 0010 0101 0001 011 001 0 00 010 0000 101 000011111 1111 0000 0010 0101

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
icon
Related questions
Question

Please choose ALL (multiple answers) correct answers) with explanation. Thank you!

Assume register R1 contains an arbitrary integer A, and R2 contains an arbitrary integer B.
Which of the following sequences of machine instructions implement the exact condition A
< B so that the branch skips the halt instruction?
Mark all correct choices. FYI: Be certain; Canvas deducts points for incorrect choices.
1001 011 001 1 11111
0001 011 011 1 00001
0001 011 010 0 00 011
0000 001 000011111
1111 0000 0010 0101
0001 011 001 0 00 010
0000 001 000011111
1111 0000 0010 0101
1001 011 001 1 11111
0001 011 011 1 00001
0001 011 010 0 00 011
0000 101 000011111
1111 0000 0010 0101
1001 011 010 1 11111
0001 011 011 1 00001
0001 011 001 0 00 011
0000 010 000011111
1111 0000 0010 0101
1001 011 010 1 11111
0001 011 011 1 00001
0001 011 001 00 011
0000 100 000011111
1111 0000 0010 0101
0001 011 001 0 00 010
0000 101 000011111
1111 0000 0010 0101
Transcribed Image Text:Assume register R1 contains an arbitrary integer A, and R2 contains an arbitrary integer B. Which of the following sequences of machine instructions implement the exact condition A < B so that the branch skips the halt instruction? Mark all correct choices. FYI: Be certain; Canvas deducts points for incorrect choices. 1001 011 001 1 11111 0001 011 011 1 00001 0001 011 010 0 00 011 0000 001 000011111 1111 0000 0010 0101 0001 011 001 0 00 010 0000 001 000011111 1111 0000 0010 0101 1001 011 001 1 11111 0001 011 011 1 00001 0001 011 010 0 00 011 0000 101 000011111 1111 0000 0010 0101 1001 011 010 1 11111 0001 011 011 1 00001 0001 011 001 0 00 011 0000 010 000011111 1111 0000 0010 0101 1001 011 010 1 11111 0001 011 011 1 00001 0001 011 001 00 011 0000 100 000011111 1111 0000 0010 0101 0001 011 001 0 00 010 0000 101 000011111 1111 0000 0010 0101
Table of LC-3 Instructions:
NOT
ADD
AND
ADD
AND
LDR
STR
LD
ST
LDI
STI
LEA
BR
JMP
TRAP
15 14 13 12 11 10 9 8 7 6 5 4 3210
1
O
1 DST
SRC
1 1
1
DST
SRC1
0 0
1
DST
SRC1
000
1
DST
SRC 1
1
DST
SRC
1
1 1 O
DST
BASE
O 1 1 1
SRC
BASE
1 O
DST
1 1
SRC
1
1 O
DST
1
1 1
SRC
1 1 1 O
DST
O
O
1 O
O
O
O 1
O
O
O
O
O
ο ο ο ο Ν ΖΡ
UNUSED 1 1 01
1 1
00
1 1 1 10
BASE
000
1 1 1
Immediate (5)
Immediate (5)
Offset (6)
Offset (6)
PC Offset (9)
PC Offset (9)
PC Offset (9)
PC Offset (9)
PC Offset (9)
SRC2
SRC2
PC Offset (9)
are set by ADD, AND, NOT, LD, LDR, LDI, LEA
are used by BR based on the most recent instruction to set CC
4. Trap Vector is an 8-bit value that is used to call an OS service routine:
o Ox21 output a character
o
Ox23 input a character
o Ox25 halt the program
1
0 0 0 0 0 0
Trap Vector (8)
SEMANTICS
R[DST] NOT(R[SRC])
R[DST] R[SRC1] + R[SRC2]
R[DST]
R[SRC1] & R[SRC2]
R[DST]
R[SRC] + SEXT(Immediate5)
R[DST] R[SRC] & SEXT(Immediate5)
R[DST] M[R[BASE]+SEXT(Offset6)]
M[R[BASE]+SEXT(Offset6)] ← R[SRC]
R[DST] M[inc(PC)+SEXT(PCOffset9)]
M[inc(PC)+SEXT(PCOffset9)] ← R[SRC]
R[DST] M[M[inc(PC)+SEXT(PCOffset9)]]
Notes:
1. BASE, SRC, SRC1, SRC2, DST are 3-bit register designations that access the Register File, R[...]
2. Immediate, Offset, PC Offset are N-bit 2's complement integers, where N is given in ()'s above
3. Condition Codes
M[M[inc(PC)+SEXT(PCOffset9)]] ← R[SRC]
R[DST] inc(PC)+SEXT(PCOffset9)
PC inc(PC)+SEXT(PCOffset9) if condition set
else PC inc(PC) See Note 3 below.
PC ← R[BASE]
jump to trap vector, See Note 4 below.
invalid instruction
Transcribed Image Text:Table of LC-3 Instructions: NOT ADD AND ADD AND LDR STR LD ST LDI STI LEA BR JMP TRAP 15 14 13 12 11 10 9 8 7 6 5 4 3210 1 O 1 DST SRC 1 1 1 DST SRC1 0 0 1 DST SRC1 000 1 DST SRC 1 1 DST SRC 1 1 1 O DST BASE O 1 1 1 SRC BASE 1 O DST 1 1 SRC 1 1 O DST 1 1 1 SRC 1 1 1 O DST O O 1 O O O O 1 O O O O O ο ο ο ο Ν ΖΡ UNUSED 1 1 01 1 1 00 1 1 1 10 BASE 000 1 1 1 Immediate (5) Immediate (5) Offset (6) Offset (6) PC Offset (9) PC Offset (9) PC Offset (9) PC Offset (9) PC Offset (9) SRC2 SRC2 PC Offset (9) are set by ADD, AND, NOT, LD, LDR, LDI, LEA are used by BR based on the most recent instruction to set CC 4. Trap Vector is an 8-bit value that is used to call an OS service routine: o Ox21 output a character o Ox23 input a character o Ox25 halt the program 1 0 0 0 0 0 0 Trap Vector (8) SEMANTICS R[DST] NOT(R[SRC]) R[DST] R[SRC1] + R[SRC2] R[DST] R[SRC1] & R[SRC2] R[DST] R[SRC] + SEXT(Immediate5) R[DST] R[SRC] & SEXT(Immediate5) R[DST] M[R[BASE]+SEXT(Offset6)] M[R[BASE]+SEXT(Offset6)] ← R[SRC] R[DST] M[inc(PC)+SEXT(PCOffset9)] M[inc(PC)+SEXT(PCOffset9)] ← R[SRC] R[DST] M[M[inc(PC)+SEXT(PCOffset9)]] Notes: 1. BASE, SRC, SRC1, SRC2, DST are 3-bit register designations that access the Register File, R[...] 2. Immediate, Offset, PC Offset are N-bit 2's complement integers, where N is given in ()'s above 3. Condition Codes M[M[inc(PC)+SEXT(PCOffset9)]] ← R[SRC] R[DST] inc(PC)+SEXT(PCOffset9) PC inc(PC)+SEXT(PCOffset9) if condition set else PC inc(PC) See Note 3 below. PC ← R[BASE] jump to trap vector, See Note 4 below. invalid instruction
Expert Solution
trending now

Trending now

This is a popular solution!

steps

Step by step

Solved in 5 steps

Blurred answer
Follow-up Questions
Read through expert solutions to related follow-up questions below.
Follow-up Question

Here, you answered when A = B. But the question asks when A < B. I was wondering if you could please re-phase so when A < B. Thank you!

Solution
Bartleby Expert
SEE SOLUTION
Knowledge Booster
Fundamentals of Computer System
Learn more about
Need a deep-dive on the concept behind this application? Look no further. Learn more about this topic, computer-science and related others by exploring similar questions and additional content below.
Similar questions
  • SEE MORE QUESTIONS
Recommended textbooks for you
Database System Concepts
Database System Concepts
Computer Science
ISBN:
9780078022159
Author:
Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:
McGraw-Hill Education
Starting Out with Python (4th Edition)
Starting Out with Python (4th Edition)
Computer Science
ISBN:
9780134444321
Author:
Tony Gaddis
Publisher:
PEARSON
Digital Fundamentals (11th Edition)
Digital Fundamentals (11th Edition)
Computer Science
ISBN:
9780132737968
Author:
Thomas L. Floyd
Publisher:
PEARSON
C How to Program (8th Edition)
C How to Program (8th Edition)
Computer Science
ISBN:
9780133976892
Author:
Paul J. Deitel, Harvey Deitel
Publisher:
PEARSON
Database Systems: Design, Implementation, & Manag…
Database Systems: Design, Implementation, & Manag…
Computer Science
ISBN:
9781337627900
Author:
Carlos Coronel, Steven Morris
Publisher:
Cengage Learning
Programmable Logic Controllers
Programmable Logic Controllers
Computer Science
ISBN:
9780073373843
Author:
Frank D. Petruzella
Publisher:
McGraw-Hill Education