Assignment-04. A non-pipelined CPU has 12 general purpose registers (RO, R1, R2, .... Following operation are supported: R12). ADD Ra, Rb, Rr Add Ra to Rb and store the result in Rr MUL Ra, Rb, Rr Multiply Ra to Rb and store the result in Rr MUL operations takes two clock cycles, ADD takes one clock cycle. Calculate minimum number of clock cycles required to compute the value of the expression XY+XYZ+YZ The variables X, Y, Z are initially available in registers RO, R1 and R2 and contents of these registers must not be modified.

Computer Networking: A Top-Down Approach (7th Edition)
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Author:James Kurose, Keith Ross
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Chapter1: Computer Networks And The Internet
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Assignment-04.
A non-pipelined CPU has 12 general purpose registers (RO, R1, R2, .
Following operation are supported:
R12),
....
ADD Ra, Rb, Rr Add Ra to Rb and store the result in Rr
MUL Ra, Rb, Rr Multiply Ra to Rb and store the result in Rr
MUL operations takes two dlock cycles, ADD takes one clock cycle.
Calculate minimum number of clock cycles required to compute the value of the expression
XY +XYZ + YZ
The variables X,Y, Z are initially available in registers RO, R1 and R2 and
contents of these registers must not be modified,
Transcribed Image Text:Assignment-04. A non-pipelined CPU has 12 general purpose registers (RO, R1, R2, . Following operation are supported: R12), .... ADD Ra, Rb, Rr Add Ra to Rb and store the result in Rr MUL Ra, Rb, Rr Multiply Ra to Rb and store the result in Rr MUL operations takes two dlock cycles, ADD takes one clock cycle. Calculate minimum number of clock cycles required to compute the value of the expression XY +XYZ + YZ The variables X,Y, Z are initially available in registers RO, R1 and R2 and contents of these registers must not be modified,
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