8.3 An Acc-ISA CPU executes the following instructions using 3-bit op-codes and 5-bit address or 2's complement data. Do the following: LD address IIAcc - Memory [address], read from LM2 IIAcc - data (a 2's complement number, sign extended) IIAcc - Acc + data (data is a 2's complement number, sign extended) IIACC - Acc - data (data is a 2's complement number, sign extended) IIAcc - Acc + Memory[address] I/M[address] - Acc IIACC - Acc - Memory[address] I/PP - address LD data ADD data SUB data ADD (address) STM (address) SUB (address) JMP address JZ address a) Draw a data path for the CPU assuming the DM has separate input and output bus as in the data path shown in Fig. 8.7. Do not include additional data paths not used by the instructions. (40 pts)

Database System Concepts
7th Edition
ISBN:9780078022159
Author:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Chapter1: Introduction
Section: Chapter Questions
Problem 1PE
icon
Related questions
Question
8.3 An Acc-ISA CPU executes the following instructions using 3-bit op-codes and 5-bit address or 2's
complement data. Do the following:
LD address
IIAcc - Memory [address], read from LM2
IIAcc - data (a 2's complement number, sign extended)
IIAcc - Acc + data (data is a 2's complement number, sign extended)
IIAcc - Acc - data (data is a 2's complement number, sign extended)
IIAc-
LD data
ADD data
SUB data
ADD (address)
STM (address)
SUB (address)
JMP address
Acc + Memory[address]
IIM[address] - Acc
IIAcc - Acc - Memory[address]
//PP - address
JZ address
a) Draw a data path for the CPU assuming the DM has separate input and output bus as in the data
path shown in Fig. 8.7. Do not include additional data paths not used by the instructions. (40 pts)
Transcribed Image Text:8.3 An Acc-ISA CPU executes the following instructions using 3-bit op-codes and 5-bit address or 2's complement data. Do the following: LD address IIAcc - Memory [address], read from LM2 IIAcc - data (a 2's complement number, sign extended) IIAcc - Acc + data (data is a 2's complement number, sign extended) IIAcc - Acc - data (data is a 2's complement number, sign extended) IIAc- LD data ADD data SUB data ADD (address) STM (address) SUB (address) JMP address Acc + Memory[address] IIM[address] - Acc IIAcc - Acc - Memory[address] //PP - address JZ address a) Draw a data path for the CPU assuming the DM has separate input and output bus as in the data path shown in Fig. 8.7. Do not include additional data paths not used by the instructions. (40 pts)
Expert Solution
trending now

Trending now

This is a popular solution!

steps

Step by step

Solved in 3 steps with 2 images

Blurred answer
Knowledge Booster
Fundamentals of Computer System
Learn more about
Need a deep-dive on the concept behind this application? Look no further. Learn more about this topic, computer-science and related others by exploring similar questions and additional content below.
Similar questions
  • SEE MORE QUESTIONS
Recommended textbooks for you
Database System Concepts
Database System Concepts
Computer Science
ISBN:
9780078022159
Author:
Abraham Silberschatz Professor, Henry F. Korth, S. Sudarshan
Publisher:
McGraw-Hill Education
Starting Out with Python (4th Edition)
Starting Out with Python (4th Edition)
Computer Science
ISBN:
9780134444321
Author:
Tony Gaddis
Publisher:
PEARSON
Digital Fundamentals (11th Edition)
Digital Fundamentals (11th Edition)
Computer Science
ISBN:
9780132737968
Author:
Thomas L. Floyd
Publisher:
PEARSON
C How to Program (8th Edition)
C How to Program (8th Edition)
Computer Science
ISBN:
9780133976892
Author:
Paul J. Deitel, Harvey Deitel
Publisher:
PEARSON
Database Systems: Design, Implementation, & Manag…
Database Systems: Design, Implementation, & Manag…
Computer Science
ISBN:
9781337627900
Author:
Carlos Coronel, Steven Morris
Publisher:
Cengage Learning
Programmable Logic Controllers
Programmable Logic Controllers
Computer Science
ISBN:
9780073373843
Author:
Frank D. Petruzella
Publisher:
McGraw-Hill Education